Анотация: An optimization of different current mirror topologies was made via simulation analysis and utilization of modern layout design methods. The investigated low voltage, short channel circuits operate with a supply voltage of 1.5 V. The current mirrors were simulated and design using 0.11 хm technology in a Virtuoso Cadence CAD tool. This investigation shows that high-performance circuits can be obtained by use of the casc de technique and other design solutions that reduce ratio errors due to nonidel effects

Забележки: Студенти, докторанти и млади учени